The present disclosure relates to a semiconductor structure, and particularly to a method of forming a sidewall spacer for a fin field effect transistor (finFET) selectively on sidewalls of a gate electrode, and structures formed by the same.
A conventional gate spacer formation process includes conformal deposition of a dielectric material layer and a subsequent anisotropic etch that removes horizontal portions of the deposited dielectric material layer. In the case of a fin field effect transistor, therefore, vertical portions of the deposited dielectric material layer are present on the sidewalls of semiconductor fins. In order to remove the vertical portions of the deposited dielectric material layer from the sidewalls of the semiconductor fins, an extended anisotropic etch process must be employed. Collateral etching of other dielectric materials, such as a shallow trench isolation structure, must be minimized during the extended anisotropic etch process for removing the vertical portions of the deposited dielectric material layer from the sidewalls of the semiconductor fins. The need to remove the deposited dielectric material from the sidewalls of the semiconductor fins imposes severe limitations on selection of dielectric materials that can be employed for the conventional gate spacer.